Senior Product, Test and Yield Enhancement Engineer - Taiwan

About the role

Cerebras Systems builds the world's largest AI chip, a wafer-scale engine that delivers training and inference speeds over 10 times faster than GPU-based cloud services. The company is seeking a senior VLSI product and test engineer with 10+ years of experience in semiconductor testing, failure analysis and yield enhancement. You will drive the test strategy for future generations of the Cerebras Wafer Scale Engine in Taiwan, covering AI processors, high-speed I/O and memory.

Key responsibilities

• Develop and optimize production test programs for wafer-scale AI processors.
• Drive high-volume manufacturing testing with foundries and outsourced OSAT partners.
• Implement and optimize design-for-test strategies, including scan, BIST, ATPG and functional testing.
• Analyze ATE, Shmoo, parametric and defect data to improve yield and fault tolerance.
• Develop failure-analysis and fault-isolation methods for defective cores, tiles and functional blocks.
• Build efficient wafer-level test flows for mesh and network-on-chip architectures and die-to-die interconnects.
• Partner with DFT, architecture, design, performance, software and manufacturing teams.
• Optimize voltage-frequency limits, current, thermal behavior, power delivery and parallel die-testing capabilities.
• Support wafer and lot disposition decisions in high-volume manufacturing.

Required profile

• BS or MS in Electrical Engineering, Computer Engineering or a related field.
• 10+ years of semiconductor product or test-engineering experience on highly integrated devices.
• Experience testing large parallel processors, GPUs, CPUs or networking ASICs with SRAM, DDR/DRAM or HBM.
• Expert hands-on experience with the Advantest V93000 platform; Teradyne experience is a plus.
• Experience specifying, designing and debugging load boards and probe cards.
• Preferred: programming in C, C++, Python or Perl for test-data analysis, and experience with Tessent, OBIRCH, IREM and LADA.

Required skills

• Test development, silicon debug, test optimization and yield improvement.
• Git-based development and release flows.
• Strong cross-functional collaboration and problem-solving.

The position is based in Taiwan and requires at least 50% travel within Taiwan. The Sunnyvale location mentioned in the listing is listed by default and should be disregarded.