Signal Integrity Engineer – Infrastructure Hardware

About the role

Meta's infrastructure hardware team is seeking a Signal Integrity Engineer to lead the design and validation of high‑speed interconnects across its data‑center platforms. You will own the SI/PI methodology for next‑generation AI, networking, compute and storage systems, ensuring reliable data transmission over Ethernet, PCIe, DDR and optical links.

Key responsibilities

• Develop next‑generation SI/PI solutions for AI, network, compute and storage platforms.
• Perform signal integrity simulations, implementation, validation and test at platform, board and system levels using tools such as HSpice, ADS or Sigrity.
• Create and maintain channel models, IBIS‑AMI models and S‑parameter extraction workflows for board‑level and system‑level analysis.
• Define open on‑ and off‑chip interconnect technologies and integrate them into scalable systems.
• Collaborate with design and manufacturing teams to set stack‑up, routing, via and impedance requirements for multi‑layer high‑speed designs.
• Drive lab correlation and validation activities (TDR, VNA, oscilloscope) to verify simulations and characterize channel performance.
• Partner with silicon vendors and ASIC teams to evaluate PHY specs, equalization parameters and link‑training behavior.
• Establish design guidelines, review processes and SI sign‑off criteria across Meta's hardware portfolio.
• Identify systemic SI risks early and influence architectural trade‑offs with hardware and mechanical teams.
• Mentor engineers on SI principles, simulation best practices and measurement techniques.

Required profile

• Bachelor's degree in Electrical Engineering, Computer Science, Computer Engineering or a related technical field, or equivalent practical experience.
• 8+ years of experience in signal integrity engineering for high‑speed digital systems, including board‑level and system‑level SI/PI analysis.
• Hands‑on experience with PCB board design and layout, high‑speed interconnects and switching using merchant silicon ASICs.
• Proven track record of delivering signal integrity solutions from concept through production deployment.
• Experience working with ODM and OEM suppliers.

Required skills

• HSpice, ADS, Sigrity simulation tools.
• IBIS‑AMI modeling and S‑parameter extraction.
• TDR, VNA and oscilloscope measurement techniques.
• PCB layout and high‑speed routing, multi‑layer stack‑up design, impedance target definition.
• Knowledge of Ethernet, PCIe, DDR and optical interconnect standards.
• Understanding of PHY specifications, equalization and link‑training mechanisms.