Senior ASIC Engineer

About the role

Qualcomm is seeking a Senior ASIC Engineer to lead the definition, modeling, design, optimization, verification, validation, implementation, and documentation of IP blocks and system‑on‑chips for high‑performance, low‑power products. The role involves close collaboration with cross‑functional teams to ensure product requirements are met.

Key responsibilities

• Leverage advanced ASIC knowledge to define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP blocks or SoCs for high‑performance, low‑power products.
• Collaborate with software architecture, hardware architecture, product management, and program management teams to develop implementation strategies that satisfy system requirements and customer needs.
• Evaluate the full design flow from high‑level architecture through synthesis, place‑and‑route, timing, power analysis, and verification, or custom circuit layout flow.
• Utilize EDA tools such as RTL‑to‑GDS flow and Cadence Virtuoso to execute complex block/SoC designs and produce detailed technical documentation.

Required profile

• Bachelor’s degree in Science, Engineering, or related field with 4+ years of ASIC design, verification, validation, or integration experience (or equivalent higher degree with reduced experience requirements).
• Master’s degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science with 6+ years of relevant experience is preferred.
• Demonstrated ability to work independently, provide guidance to team members, and influence decisions consulted by senior leadership.

Required skills

• ASIC design, verification, validation, and integration.
• Experience with architecture and design tools.
• Proficiency in scripting tools and programming languages.
• Design verification methods.
• RTL‑to‑GDS flow.
• Cadence Virtuoso.