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Senior Analog Design Engineer

analogdevices · Songgao

New
Senior 🇬🇧 English
Cadence Verilog Verilog-A Verilog-AMS WREAL Simplis Python

Job description

About the role

Analog Devices' Taipei Design Center is looking for an experienced Senior Analog IC Design Engineer to support assigned IC products through the full product life cycle. The position is part of the Consumer Business Unit and is based in Taipei.

Key responsibilities

  • Create transistor-level designs of circuits to meet specifications
  • Verify designs using transistor-level and behavioral-level simulations
  • Supervise circuit layout
  • Perform AMS simulation for top-level verification
  • Model DC-DC switching regulator behavior with Simplis or Verilog-A or Verilog-AMS
  • Read and understand Verilog RTL
  • Write circuit documentation and test plan, and work with the test engineer to firm up test plans and design for testability
  • Validate circuit performance in the lab

Required profile

  • Master's degree in electrical engineering or a related field
  • 3 years of analog/mixed-signal design experience
  • Good to excellent knowledge of building blocks such as bandgaps, operational amplifiers, comparators, relaxation oscillators, PLL, and feedback and compensation techniques
  • Good writing and verbal communication skills in English
  • Good teamwork skills

Required skills

  • Preferred: good knowledge of DC-DC topologies such as buck, boost, buck-boost, charge pump and LDO
  • Preferred: proficiency in the Cadence design environment and mixed-signal simulation
  • Preferred: knowledge of Verilog-A, Verilog-AMS or WREAL modeling, Verilog, and scripting languages such as Python or shell scripting

Applicants who need access to technical data may have to undergo an export licensing review. The position is a day shift with no travel required.

Questions fréquentes

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Source : ats:workday

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Published 10小时前

Expires 1个月后

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analogdevices

Songgao