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CPU Architecture and Performance Architect

Google · Panchiao

New
🇬🇧 English
C/C++ Python ARM RISC-V x86 Linux drivers runtime performance modeling CPU microarchitecture instruction set architecture machine learning branch prediction workload characterization

Job description

About the role

Join Google’s silicon team to design custom processors that power billions of consumer devices. You will shape next‑generation SoC performance, efficiency, and integration by advancing instruction set architecture and micro‑architecture features.

Key responsibilities

  • Drive performance correlation between models and RTL, including micro‑benchmark creation, pre‑silicon validation, and post‑silicon debugging.
  • Plan and evaluate CPU architecture features from both architectural and performance perspectives.
  • Develop performance models for analysis and micro‑architecture design studies.
  • Collaborate with RTL, verification, physical design, power, thermal, security, and other engineering teams to deliver a high‑performance CPU implementation.

Required profile

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent practical experience.
  • 8+ years of experience in high‑performance microprocessor architecture, CPU microarchitecture, and workload performance analysis.
  • Experience with instruction set architecture (ISA), machine learning, or branch prediction.
  • Strong background in performance modeling, analysis, correlation, and workload characterization.

Required skills

  • Proficiency in C/C++ and scripting languages such as Python.
  • Deep knowledge of processor ISAs (e.g., ARM, RISC‑V, x86).
  • Experience with Linux, drivers, and runtime environments.
  • Expertise in performance modeling, micro‑benchmark development, and workload characterization.

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Published 14小时前

Expires 1个月后

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