Principal DRAM Architect – MTS

About the role

Micron Technology is seeking a Principal DRAM Architect (MTS) to lead system‑level DRAM performance, power efficiency and cost optimization. The role involves driving architectural innovation for current and future DRAM generations and mentoring team members.

Key responsibilities

• Develop system‑level solutions, tools, and methodologies to optimize DRAM performance, power efficiency, and cost.
• Collaborate with multi‑functional teams to ideate, evaluate, and implement innovative DRAM and memory system solutions.
• Analyze system behavior, assess solution effectiveness, and make data‑driven optimizations and trade‑offs.
• Drive architectural innovation for current and future generations of DRAM technologies.
• Communicate complex technical concepts clearly and mentor team members through training and technical guidance.

Required profile

• Minimum 7 years of experience in the memory or semiconductor industry.
• Strong understanding of DRAM architectures and system‑level interactions.
• Proven experience in memory design, product engineering, memory specifications, or memory system architecture.
• Bachelor’s degree in Electrical Engineering, Physics, Computer Engineering, or related field, or equivalent experience.

Required skills

• DRAM architecture knowledge (e.g., LPDDR5/6, DDR5/6, GDDR6/7, HBM3E/4).
• System‑level analysis and optimization.
• Analytical problem‑solving and data‑driven decision making.