Layout Engineer

About the role

Monolithic Power Systems, Inc. (MPS) is a fast‑growing semiconductor company seeking a Layout Engineer to support the development of mixed‑signal and analog integrated circuits. The role works closely with the Design, CAD, and Layout Manager to deliver high‑quality chip layouts.

Key responsibilities

• Estimate layout schedules and plan chip dimensions.
• Place devices at the block level according to matching requirements.
• Implement blocks on the top level and apply shielding techniques for sensitive nets.
• Define pad/ESD rules, routing, and connections.
• Perform database DRC and LVS verifications.
• Execute chip tape‑out following MPS tape‑out procedures.

Required profile

• Layout experience in analog and/or mixed‑signal circuit design.
• Ability to create chip plans, estimate die size, and manage project schedules.
• Capability to resolve DRC and LVS verification independently.
• Familiarity with analog process fundamentals.
• Experience with Cadence and/or Virtuoso tools is preferred.

Required skills

• Analog layout
• Mixed‑signal circuit design
• Chip planning and die‑size estimation
• DRC verification
• LVS verification
• Cadence
• Virtuoso