Senior Analog Layout Engineer

About the role

Analog Devices, a global semiconductor company, is hiring a Senior Analog Layout Engineer in Zhubei City, Taiwan. The role covers block-to-top-level layout design for high-precision analog products, physical verification and project management, with about 10% travel required.

Key responsibilities

• Perform block-to-top-level layout design, including floor plan, package implementation and top-level integration for high-precision analog products.
• Run DRC, LVS, antenna checks and other physical verification tools to sign off project tape-out.
• Use physical layout knowledge such as matching, parasitics, LDE, ESD and latch-up to improve project performance.
• Manage layout schedules and resource allocation, and guide junior engineers on projects.

Required profile

• BSEE or EE-related degree, with 5+ years of experience in an analog/mixed-signal layout role (equivalent degree or experience acceptable).
• Good written and verbal English.
• Preferred: rich experience with top layout design and tape-out flow, familiarity with IC package design, and experience with global or cross-site teams.

Required skills

• Top-down physical design: full-chip/block layout, place and route, floor planning, power and clock optimization, noise isolation, DFM-compliant layouts and physical verification.
• Foundry process, device matching, layout-dependent effects, shielding, EM, IR drop analysis, ESD/latch-up and device isolation.
• Basic device structures and circuit theory (DAC, ADC, LDO, bandgap, amplifier) for high-precision designs.