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Senior Signal & Power Integrity Engineer – Pixel

Google · Panchiao

Senior 🇬🇧 English
Power Integrity simulation Ansys HFSS SIwave Designer Cadence Sigrity ADS Hspice TDR VNA PCB design Flex technology Hardware system architecture SoC PMIC Sensors Display Touch Camera RF subsystems

Job description

About the role

Google’s Devices & Services team is looking for a senior engineer to lead signal and power integrity (SI/PI) efforts for its Pixel hardware platforms. You will shape architecture decisions, drive electrical design, and ensure robust validation for next‑generation consumer electronics.

Key responsibilities

  • Define and manage architecture selection, electrical design, and validation for Pixel products.
  • Develop and enforce SI/PI design rules for advanced PCB and flex technologies.
  • Participate in PCB design reviews and resolve SI/PI challenges with design, PCB, and system teams.
  • Run simulations, design‑of‑experiments (DoE), and root‑cause analyses to debug and optimise SI/PI issues.
  • Collaborate with engineering and qualification groups on system bring‑up, test data analysis, and mass‑production hand‑off.

Required profile

  • Bachelor’s degree in Electrical or Computer Engineering (or equivalent practical experience).
  • At least 4 years of consumer‑electronics or embedded‑system design experience.
  • Minimum 4 years of SI/PI simulation on system boards (SoC, memory, communication interfaces).
  • Preferred: MS or PhD in Electrical/Computer Engineering and 8 years of product‑development experience for high‑volume production.

Required skills

  • Signal and power integrity simulation (Ansys HFSS, SIwave, Designer, Cadence Sigrity, ADS, Hspice).
  • Test equipment expertise (TDR, VNA).
  • Strong understanding of hardware system architecture (SoC, PMIC, audio, sensors, display, touch, camera, RF).
  • PCB and flex design rule creation and review.
  • Design‑of‑experiments and root‑cause analysis for SI/PI debugging.

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Published 1个月前

Expires 3周后

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